General purpose decentralised computer architecture

Abstract

This thesis is concerned with decentralised highly concurrent computer architecture which may eventually provide alternatives to the centralised sequential erchitectures of conventional general purpose computers. There is currently considerable research into such alternatives, for which the principal motivations are the use of concurrency to improve performance, the support of various novel, very high level programming languages, and the exploitation of very large scale circuit integration (VLSI). The different proposed alternative architectures are surveyed and analysed, and architectures synthesising their underlying concepts are proposed. The thesis consists of three main parts. Ihe first part is an analysis and survey of proposed general-purpose decentralised architectures. Three classes of architectures are identified, namely control flow, data flow and reduction. The analysis shows that each class has particular, complementary, strengths and weaknesses. The second and third parts cover the development of two architectures which combine the different concepts underlying control flow, data flow and reduction in order to overcome the indivdual weaknesses in each. Thus the second part presents a "data/control flow" architecture which is a synthesis of data flow and control flow. There is an experimental implementation of this architecture in which a number of standard microcomputers cooperate in the execution of a program. In contrast the third part presents a "recursive control flow" (ReF) architecture which is a synthesis of control flow, data flow and reduction. This architecture is based on a set of general principles of recursive structuring which are intended to provide a common basis for decentralised system organisation at various architectural levels, ranging from VLSI design to geographically distributed networks. The RCF work is thus not only an investigation into the possibility of incorporating control flow, data flow and reduction concepts in a single parallel computer but also an initial investigation of the application of the recursive structuring principles. These two aspects of the work are closely related in that recursive structuring facilitates the modularity which is required for the synthesis of control flow, data flow and reduction into a coherent overall system. An implementation of the RCF architecture, using a number of identical microcomputer's, is proposed. The detailed design of a special-purpose LSI microcomputer chip for this implementation is currently being produced.