Research on the topology of switched capacitor multilevel inverter

Abstract

With the gradual depletion of fossil energy and the deterioration of the global climate caused by greenhouse gas emissions, renewable energy power generation has become a hot research topic today. Multi-level inverter is an important equipment in renewable energy power generation system. The switched capacitor inverter, which evolved on the basis of the multi-level inverter, has attracted widespread attention in recent years due to its advantages of self-boosting, self-balancing of capacitor voltage, and suitability for medium and high power. This thesis conducts a comprehensive analysis and research on various multilevel inverters, and then proposes a 13-level switched capacitor inverter topology and a 17- level switched capacitor inverter topology. For the 13-level switched capacitor inverter, there are one DC source input and 3 times voltage gain of the output voltage. The number of the switch is 13 and the number of the diode is 2. The utilization of the t- type structure makes the output voltage step reduced to 1/2Vdc and the utilization of the crossing structure gives the topology the capability of inherent output voltage polarity shift. Redesigned series/parallel switched capacitor unit makes the inverter has the capability of flexible extension to output variable number of output voltage level and output voltage gain. Compared with diode-clamped multilevel inverter, when output the 13-voltage levels, the number of the switches utilize in the circuit is 24 and the number of diodes is 66. So the 13-level switched capacitor inverter proposed in this thesis, the number of the switch is approximately 1.85 times lower than that of the diode clamped multilevel inverter. The number of the diode is 33 times fewer than that of the diode clamped multilevel inverter. The flying capacitor inverter requires relatively more components for the same number of output voltage levels. Compared to the proposed 13-level switched capacitor inverter in this thesis, the flying capacitor inverter has 1.85 times the number of switches and 3 times the number of capacitors. Additionally, the flying capacitor multilevel inverter suffers from capacitor voltage imbalance, whereas the inverter proposed in this thesis has the capability of self- balancing capacitor voltages. The 17-level switched capacitor inverter proposed in this thesis is an optimization of the 13-level switched capacitor inverter. By repositioning the DC power sources and adding two necessary switches and one essential diode, the design achieves a higher number of output voltage levels and a 4 times output voltage gain. Based on the switched capacitor inverters with the same number of output levels designed by other scholars in recent years, the typical number of switches used is 20-24, the number of capacitors used is 5-8, and the achieved voltage gain is 2-3 times. Therefore, the 17- level switched capacitor inverter proposed in this thesis reduces the number of switches by 25%, the number of capacitors by 33.3%, and improves the voltage gain by 33.3%. Both of these two proposed topologies are controlled by the phase disposition pulse width modulation (PDPWM) strategy and MATLAB/Simulink is utilized to conduct simulation studies on the two proposed topologies, with a detailed comparative analysis. The results indicate that the device cost of the proposed 17-level switched capacitor inverter is reduced by 34% compared to that of the 13-level switched capacitor inverter, implying a lower component count for the 17-level inverter. Additionally, the Peak Voltage Stress of the 17-level switched capacitor inverter is reduced by 25% compared to the 13-level inverter. In subsequent hardware experiments, the control logic for the 17-level switched capacitor inverter is implemented using FPGA, and detailed experiments are carried out to evaluate its output performance under various load conditions. The results demonstrate the good performance of the proposed 17-level switched capacitor inverter.